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Process & Lithography
Nodes, EUV tools, yield, and the push toward angstrom‑class manufacturing.
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How to Build Your Own ASIC Upgrade Calculator (Before 2027)
2+ hour, 34+ min ago (587+ words) Online profitability calculators are handy, but they hide the logic. If you understand the six formulas underneath, you can sanity check any calculator, any ranking and any sales pitch. This is a step-by-step walkthrough you can build in a spreadsheet…...
Siemens transforms computational lithography for next-generation AI semiconductors with NVIDIA cuLitho
17+ hour, 9+ min ago (168+ words) Without acceleration, these essential techniques are often too slow for full-chip, manufacturing-scale deployment, and forcing engineering teams to make trade-offs between optimization depth and project schedules. This creates a risk of lithographic hotspots and reduced process margins, which can impact…...
IBM stacks silicon wafers for a denser, faster chip
11+ hour, 30+ min ago (349+ words) The nanostack architecture reconfigures transistor arrangement, allowing for the stacking of nanosheets and a departure from traditional two-dimensional scaling limitations. IBM’s approach fundamentally alters how transistors are built, moving beyond the established X and Y axes to incorporate the Z…...
Huawei's Mate 90 Pro Max Ties the iPhone 18 Pro Max in 7 Rounds. Where You Live Breaks the Tie
18+ hour, 27+ min ago (1268+ words) Our Mate 90 Pro Max vs iPhone 18 Pro Max comparison ends 3–3, with Huawei's 6,800mAh battery and 200MP zoom against Apple's A20 Pro, which scores about 2.6x higher in single-core tests. You'll see why the tiebreaker comes down to where you live and which apps you…...
Chinese Startup Unveils First EUV Light Source Prototype To Challenge ASML’s Monopoly, But Dutch Firm Won’t Be Losing Any Sleep Over This Progress
6+ hour, 27+ min ago (662+ words) At the 26th China International Industry Fair in Shanghai, Langdao Silex, a Chinese technology startup, revealed its self-developed EUV light source prototype called the “FlintNano LPP-OXXO.” Being a core component of EUV lithography, the company states that it has secured most…...
Huawei Proposes Enabling CPU Boost By Default For ACPI CPPC Linux Driver
10+ hour, 10+ min ago (222+ words) For those using the generic ACPI Collaborative Processor Performance Control (CPPC) CPUFreq driver such as on a number of ARM64 Linux server platforms, if the CPUs support a "boost" mode it's disabled by default. But a patch from Huawei is now…...
The ABF Substrate Bottleneck
2+ day, 22+ hour ago (729+ words) Ajinomoto Co.’s primary revenue is still food seasonings. But in 1996, Intel commissioned its chemical division to develop a film-type insulator for semiconductor packaging. Ajinomoto’s team — leveraging amino acid chemistry — delivered a working formulation in four months. Mass production started…...
Commentary: Huawei's 2027 Kirin roadmap — can LogicFolding overcome chipmaking constraints?
14+ hour, 31+ min ago (163+ words) On October 13, Huawei unveiled the detailed architecture of its Kirin 9050 Pro chip for the first time at its Lianqiu Lake research center in Shanghai, outlining advances in LogicFolding and hybrid bonding technologies. Xu Songyu, head of wireless terminal chip product…...
Strengthening Advanced-Node Interconnects Through Automated Via Insertion
13+ hour, 29+ min ago (562+ words) Plus, the cumulative effect of via resistance across a massive power delivery network (PDN) leads to IR drop. If the voltage reaching a logic gate falls below a certain threshold, the gate’s switching speed slows down, potentially leading to timing…...
Intel Processes More High-NA EUV Wafers Than All Chipmakers Combined: TSMC Joins
1+ mon, 1+ week ago (922+ words) High-NA EUV lithography passed a key scale milestone Monday: Intel Foundry has processed more than one million chip wafers using the technology, outpacing all other chipmakers combined....